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NXP/ST Power Architecture: Password protected device

08-Jan-2024

When a device is password protected, BlueBox must send the password to the device to unlock the debug interface. Before that only access to JTAG ID was available. Password is entered in Hardware / CPU Options / SoC.


64-bit password solution

The password is accepted by MPC/SPC  at any time (as well as when the CPU is reset).


256-bit password solution

The password is accepted by MPC/SPC after it is already released from reset. That means that the regular start of emulation fails because the debugger cannot unlock the debug interface before the reset is released. There are two solutions.

Hot attach


RESET method Stop

1. Select the RESET method Stop via Hardware / CPU Options / Reset.

2. Enlarge the Post RESET delay. 

3. Set JTAG Scan speed to 5000 kHz via Hardware / CPU Options / JTAG.


How does sending the password work in winIDEA

winIDEA triggers the release of the reset pin, transitioning it from a low state (0) to a high state (1). CPU goes to RUN mode. After releasing the reset pin, there is a designated waiting period Post RESET delay, during which the system remains inactive. This delay ensures that the CPU has adequately initialized. Following the Post RESET delay, winIDEA sends the debug password to the system. If the supplied password is correct, the OnCE debug module responds by providing access to the ID and BYPASS registers. If the provided password is incorrect or invalid, the OnCE debug module returns a value of 0, signifying the failure to authenticate.

Once the debugging password process is complete, the core of the CPU can be reset using the DCI (Debug Communication Interface) module, which ensures that the system is ready for further debugging activities.

In situations where the RESET method Stop is selected, the process takes an additional step. After the debug interface is unlocked, the CPU is halted or stopped, allowing for debugging and monitoring activities to take place.

Devices that have DCI module core (only core) are also reset after that via DCI. CPU is stopped before any instruction is executed.

Calypso and Calypso3M devices have no DCI. In the case of the RESET Stop method ‘final DCI reset’ is missing so the CPU is stopped somewhere in the BAM code or in the user code if JTAG communication is slow. In this case Scan speed 5000 kHz is preferred. 


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