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Infineon TriCore: Unknown trap (exception) is causing problems during application development

05-Jun-2022

TriCore architecturally does not have a mechanism that would allow CPU to be stopped when a trap (in some other architectures known as an exception) occurs. There are many mechanisms that could cause a core to trap, i.e. null pointer dereference, data alignment error, etc.

However, with a bit of knowledge of the inner workings, it is possible to achieve the same behaviour through hardware breakpoints.



Possible solution: 

TriCore trap table address is written in the BTV register. Its value can be obtained with the help of the SFR Window. In this case, the start of the trap table is on the address 0xA0000000.


1. Open the SFR Window and locate the address. 

2. Configure range execution breakpoint through Debug menu / Hardware Breakpoints.

  • Access - Range breakpoint that will hit on Instruction execution between 0xA0000000 (BTV) and end of trap vector table.
  • Event associated - Halt
  • CDC Suspend-Out - Active
  • Break - BEFORE



After a trap occurs, the CPU will stop in the trap handler. Program counter will be located at the BTV register value, ORed with Trap Class Number (TCN), which is additionally shifted left by 5 bits. Trap Identification Number (TIN), which is also needed for precise decoding of generated trap, is located in register D15.

Assuming BTV[7:0] is zero, we can decode both TCN and TIN in the Watches Window.



In the case of TriCore TC1.6.2, this trap is Internal Protection Trap - Memory Protection Null Address. For other traps consult Infineon TriCore documentation.


More resources in winIDEA Help:

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