Below configuration explains ARM System Trace Macrocell (STM) which is for example implemented in Renesas R-Car Gen3 SoCs. However, a similar approach can be applied on NXP SoCs, such as S32G.
Use case is taken from a webinar which focuses on the profiling of a boot-up process on Cortex-A bases System-On-Chips (SoCs), starting from 1st stage bootloaders until the startup of a Linux kernel; how the ARM System Trace Macrocell (STM) can be utilized for tracing a boot process distributed across multiple cores, e.g. Cortex-R7 boot core and Cortex-A53 application cores.
1. Open View / Analyzer / Analyzer Configuration button / Create New Configuration. Refer to winIDEA Help for more information.
2. Name the new configuration and select Manual.
3. Go to the STM page and enable it.
4. Set the Port enable mask in Ports within group section to FFFFFFFF which enables everything.
5. Check Timestamp in the Control section.
6. To visualize the data in the Profiler follow the detailed configuration in the iSYSTEM Webinar – SoC Boot Up Timing Analysis using ARM System Trace Macrocell.
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